The present invention generally relates to processes for forming damascene structures in semiconductor devices and, more particularly, to a process for filling a combination of intermediate sized features such as slotted vias and trenches and small sized features such as vias.
The typical chemical vapor deposition/physical vapor deposition (CVD/PVD) process which is used for dual damascene structures works extremely well for small and large feature sizes. This process consists of a CVD aluminum seed layer which is first deposited and then a PVD aluminum layer is deposited to fill and reflow into the dual damascene structures. However, in order to fill features of intermediate sizes (0.5 to 2.0 microns), the process has some problems. These include the creation of voids within the fill regions. Since the process works well for both small and large features sizes, it is not clear why problems should be encountered in filling xe2x80x9cintermediatexe2x80x9d size features.
Thus, there is a need for processes which are effective for filling xe2x80x9cintermediatexe2x80x9d size features in damascene and dual damascene structures, especially in structures having both intermediate size and small size features.
The present invention provides a novel process which is effective for filling xe2x80x9cintermediatexe2x80x9d size features in damascene and dual damascene structures, especially in structures having both intermediate size and small size features.
In one aspect, the invention encompasses methods of forming a filled metal structures in a material layer of a substrate, the methods comprising:
providing a substrate having a material layer containing a recess therein relative to a first surface of the layer;
depositing a first amount of metal into the recess by chemical vapor deposition;
depositing a second amount of metal into the recess by physical vapor deposition over the first amount of metal;
depositing a third amount of method by chemical vapor deposition over the second amount of metal; and
depositing a fourth amount of metal by physical vapor deposition or sputtering over the third amount of metal, wherein the first amount of metal, the second amount of metal, the third amount of metal and the fourth amount of metal equal a total amount of metal having a thickness sufficient to completely fill the recess.
The methods of the invention are especially useful for filling damascene and/or dual damascene recess structures in dielectric material layers, more especially structures having widths on the order of 0.5-2.0 microns.
In another aspect, the invention also encompasses integrated circuit structures containing the filled damascene or dual damascene structures, especially structures such as filled slot vias.
These and other aspects of the invention are described in further detail below.